The present application claims priority under 35 U.S.C. xc2xa7119 to Korean Application No. 2000-33234 filed on Jun. 16, 2000, which is hereby incorporated by reference in its entirety for all purposes.
1. Field of the Invention
The present invention relates to a method of testing a test system, and more particularly, to a method for reducing channel skew of a test system.
2. Description of the Related Art
Test systems are required to operate at high frequency to test the high speed operation of semiconductor apparatuses. For example, when testing the operation of a Rambus dynamic random access memory (DRAM) sending and receiving data in packet units at 800 MHZ, a test system measures a setup time and a hold time on the basis of the crossing point of master clock signals CFM and CFMN, and uses the measured setup time and hold time as reference data. This reference data is referred to as a test bin. The possibility that the test bin has an error due to skew of a signal of a data pin DQ or an instruction code pin RQ in a Rambus DRAM is high.
Incidentally, the data pin DQ of the Rambus DRAM is used for inputting and outputting data and is bidirectional, and the instruction code pin RQ is used for receiving packet information which includes instruction codes transmitted from the Rambus DRAM controller or master. Also, master clock signals CFM and CFMN are generated from the Rambus DRAM controller or master, and are synchronized with the data transmitted from the master. Master clock signal CFMN is the same as master clock signal CFM, but merely 180xc2x0 out of phase therewith.
FIG. 1 is a diagram illustrating a conventional method of adjusting a test system to reduce an error in a test bin. Referring to FIG. 1, in step 101, the test system automatically performs system calibration on the pins of a Rambus DRAM, which are inserted in sockets of the test system. Next, in step 102, the test system performs manual tweaking for fine adjustment. When it is determined in step 103 that three months has elapsed since manual tweaking in step 102, the step 101 of performing system calibration and the step 102 of performing tweaking are repeated. Due to such a periodic adjustment method, an error in a test bin can be reduced.
According to such a conventional method, scope probing should be performed on a socket pad every three months for adjustment of a test system for periodic calibration and tweaking. As a result, there occurs transformation such as enlargement of a pin hole 201 of a socket pad, as shown in FIG. 2. The transformation of a socket pad causes signal characteristics to be degraded. This will be described with reference to FIG. 3, which illustrates the distribution of data output tQ of a Rambus DRAM.
In FIG. 3, xe2x80x9ctQ_minxe2x80x9d denotes a time period from the crossing point of the master clock signals synchronized with a read command, to a point at which data is read. The distribution of time periods tQ_min with respect to the number of tests is shown in FIG. 3. A distribution (a graph represented by -xe2x97xaf-) of time periods tQ_min measured with a transformed socket pad has a larger variation than a distribution (a graph represented by -∘-) of time periods tQ_min measured with a normal socket pad without transformation. This means that channel skew occurs depending on a state of a socket pad so that a test error may increase.
Accordingly, an adjustment method of a test system for reducing a test error and for maintaining the normal state of a socket pad is desired.
The present invention is therefore directed to a method of testing a test system which substantially overcomes one or more of the problems due to the limitations and disadvantages of the related art.
To solve the above problems, it is an object of the present invention to provide an adjustment method of a test system for reducing a test error and for maintaining the normal state of a socket pad.
Accordingly, to achieve the above object of the invention, there is provided a method of adjusting a test system which has a plurality of channels and is used for testing a device connected thereto. The method includes the steps of (a) performing system calibration on the test system, (b) scope probing a test pin of the test system and fine adjusting the test system manually, (c) recording signal characteristics appearing at the channels during step (b) using the test system, (d) performing system calibration on the test system when a predetermined period has elapsed since step (c), and (e) adjusting skew between the channels using data which has been recorded in step (c).
For example, the data recorded in step (c) may be eye-shmoo data indicating the rising or falling characteristics of the signals, and step (e) may include software processing of the test system. Because the device is not installed to the test system in this testing method of the test system, transformation or deterioration of pad sockets may be reduced as compared to the conventional method of adjusting a test system. According to the present invention, damage to a socket pad of the test system is prevented, so that an error in the test system can be reduced. In addition, time for adjusting channel skew can be reduced.
Further scope of applicability of the present invention will become apparent from the detailed description given hereinafter. However, it should be understood that the detailed description and specific examples, while indicating preferred embodiments of the invention, are given by way of illustration only, since various changes and modifications within the spirit and scope of the invention will become apparent to those skilled in the art from this detailed description.